Superconducting qubit control on millisecond timescales: from rapid feedback to new qubit dynamics

QUANTUM COLLOQUIUM

I will discuss recent results from our lab on developing a tight control-and-feedback loop between rapid FPGA-based advanced logic and superconducting qubit control, which enables qubit characterization, optimization, gate benchmarking, and parameter estimation on millisecond wall-clock timescales. I will introduce our work on a suite of sparse-sampling and on-FPGA inference methods, including efficient estimators for exponential and sinusoidal response functions as well as on-FPGA implementations of NelderMead optimization, golden-section search and an adaptive Bayesian updating algorithm. With this approach, we estimate T1 in a few milliseconds and find highly surprising dynamics at these rapid timescales, we optimize readout parameters in roughly 100 ms, we optimize pulse amplitudes in 1 ms, we perform Clifford randomized benchmarking in 107 ms, and sustain more than 74,000 consecutive recalibrations during a 6-hour closed-loop run. These approaches enable in situ recalibration that can track evolving qubit dynamics and enable new approaches to maximizing superconducting qubit processor performance and reveal new physics of state-of-the-art quantum processors.